Design-Reuse

Silistix Self-Timed Interconnect Solution Adds Support for AXI Bus Protocol

Extends Designer Use of Popular AMBA Buses for Asynchronous Interconnect on SoCs SAN JOSE, CA -- July 17, 2006 -- Silistix, a provider of innovative software for on-chip communications solutions, ...
Design-Reuse

Averant Announces AMBA AXI Protocol Checker

Alameda, Calif. – June 2, 2005 – Averant Inc., a leading provider of advanced design verification technology for RTL designers, today announced the release of the SolidPC™ protocol checker for ...
Semiconductor Engineering

Moving From AMBA ACE to CHI For Coherency

Introduced back in 2011, ACE (AXI Coherency Extensions) grew from the existing AXI protocol to satisfy the cache coherency maintenance demands of SoCs with multi core processors and shared caches in ...
EDN

Verification IP on AMBA:APB,AHB,AXI

The Perfectus VIP for AXI, AHB, APB provides an efficient algorithm to verify the AMBA based designs by giving the advance techniques including the support for System Verilog assertions. AXI ...
EDN

Lower power, high-performance architecture for AMBA 3 AXI On-Chip Interconnect is unveiled

Winchester, UK – Synopsys, Inc., (Mountain View, California) software and IP specialists for semiconductor design and manufacturing, has enhanced its DesignWare IP for the ARM AMBA 3 AXI interconnect ...