Design-Reuse

Designing Using the AMBA (TM) 3 AXI (TM) Protocol -- Easing the Design Challenges and Putting the Verification Task on a Fast Track to Success

The need for higher performance applications is driving the requirement for a new age of on-chip communication infrastructure. Increasing the clock frequency no longer addresses this higher ...
EDN

Verification IP on AMBA:APB,AHB,AXI

The Perfectus VIP for AXI, AHB, APB provides an efficient algorithm to verify the AMBA based designs by giving the advance techniques including the support for System Verilog assertions. AXI ...
Semiconductor Engineering

Moving From AMBA ACE to CHI For Coherency

Introduced back in 2011, ACE (AXI Coherency Extensions) grew from the existing AXI protocol to satisfy the cache coherency maintenance demands of SoCs with multi core processors and shared caches in ...
Design-Reuse

Silistix Self-Timed Interconnect Solution Adds Support for AXI Bus Protocol

Extends Designer Use of Popular AMBA Buses for Asynchronous Interconnect on SoCs SAN JOSE, CA -- July 17, 2006 -- Silistix, a provider of innovative software for on-chip communications solutions, ...