EDN

Finding fault with traditional test pattern types

It is well established that transition and stuck-at fault models detect the vast majority of production defects. The transition fault model focuses on detecting timing-related defects. However, the ...
Hackaday

Pocket-sized Test Pattern Generator Helps Check Those CRTs

[Nicholas Murray]’s Composite Test Pattern Generator is a beautifully-made, palm-sized tool that uses an ESP32-based development board to output different test patterns in PAL/NTSC. If one is checking ...
Hackaday

test pattern

[Nicholas Murray]’s Composite Test Pattern Generator is a beautifully-made, palm-sized tool that uses an ESP32-based development board to output different test patterns in PAL/NTSC. If one is checking ...
EDN

Design for test boot camp, part 3: Advanced fault models and cell-aware test

The IDDQ test relies on measuring the supply current (I DD) of an IC’s quiescent state, when the circuit isn’t switching and inputs are held at static values. Test patterns are used to place the ...
Semiconductor Engineering

AI-Driven Test Optimization Solves Semiconductor Test Costs And Design Schedules

Artificial Intelligence has become a pervasive technology that is being applied to solve today’s complex problems, especially in the areas involving exponentially large amounts of data, their analysis ...
Semiconductor Engineering

In-System/In-Field Testing Using High-Quality Deterministic Test Patterns

The amount of electronic content in passenger cars is growing rapidly, primarily due to the integration of advanced safety features. The shift towards fully autonomous vehicles, which must comply with ...
Electronic Design

New test points help contain growing test costs

Recent and continuing trends in the semiconductor industry pose challenges to IC test-data volumes, test application times, and test costs. The industry has thus far succeeded in containing test costs ...