The data objects in VHDL and Verilog form expression operands. Knowing the operand differences between the two HDLs helps you write more efficient chip-design code. Expressions consist of operators ...

well im stuck with x86 asm code burned in my head so i may have a slight bias, but if whoever is reading you book cant adapt to 3 operand syntax then theres a larger problem. just my 2 cents.